Apostolos Fanakis
4 years ago
5 changed files with 23 additions and 992 deletions
@ -1,119 +0,0 @@ |
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; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d] |
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; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\objects\hash_function.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\hash_function.d --cpu=Cortex-M4.fp.sp --apcs=interwork -O0 --diag_suppress=9931 -I.\RTE\_Target_1 -IC:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\User\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.15.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION=534 -D_RTE_ -DSTM32F401xE -D_RTE_ --omf_browse=.\objects\hash_function.crf hash_function.c] |
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THUMB |
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|
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AREA ||i.main||, CODE, READONLY, ALIGN=2 |
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|
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REQUIRE _printf_percent |
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REQUIRE _printf_d |
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REQUIRE _printf_int_dec |
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main PROC |
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;;;45 |
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;;;46 int main(void) |
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000000 b510 PUSH {r4,lr} |
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;;;47 { |
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;;;48 static char STRING_TO_HASH[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789!!@#$%*&"; |
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;;;49 int hash = 0; |
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000002 2400 MOVS r4,#0 |
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;;;50 |
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;;;51 hash = generate_hash(STRING_TO_HASH, hashtbl); |
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000004 4905 LDR r1,|L1.28| |
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000006 4806 LDR r0,|L1.32| |
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000008 f7fffffe BL generate_hash |
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00000c 4604 MOV r4,r0 |
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;;;52 printf("%d", hash); |
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00000e 4621 MOV r1,r4 |
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000010 a004 ADR r0,|L1.36| |
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000012 f7fffffe BL __2printf |
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;;;53 |
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;;;54 return 0; |
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000016 2000 MOVS r0,#0 |
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;;;55 } |
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000018 bd10 POP {r4,pc} |
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ENDP |
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|
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00001a 0000 DCW 0x0000 |
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|L1.28| |
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DCD |symbol_number.8| |
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|L1.32| |
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DCD STRING_TO_HASH |
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|L1.36| |
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000024 256400 DCB "%d",0 |
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000027 00 DCB 0 |
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|
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AREA ||.constdata||, DATA, READONLY, ALIGN=0 |
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|
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|symbol_number.8| |
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000000 120b0a15 DCB 0x12,0x0b,0x0a,0x15 |
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000004 07050916 DCB 0x07,0x05,0x09,0x16 |
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000008 11020c03 DCB 0x11,0x02,0x0c,0x03 |
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00000c 13010e10 DCB 0x13,0x01,0x0e,0x10 |
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000010 14081704 DCB 0x14,0x08,0x17,0x04 |
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000014 1a0f0618 DCB 0x1a,0x0f,0x06,0x18 |
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000018 0d19 DCB 0x0d,0x19 |
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|
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AREA ||.data||, DATA, ALIGN=0 |
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|
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STRING_TO_HASH |
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000000 41424344 DCB 0x41,0x42,0x43,0x44 |
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000004 45464748 DCB 0x45,0x46,0x47,0x48 |
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000008 494a4b4c DCB 0x49,0x4a,0x4b,0x4c |
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00000c 4d4e4f50 DCB 0x4d,0x4e,0x4f,0x50 |
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000010 51525354 DCB 0x51,0x52,0x53,0x54 |
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000014 55565758 DCB 0x55,0x56,0x57,0x58 |
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000018 595a3031 DCB 0x59,0x5a,0x30,0x31 |
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00001c 32333435 DCB 0x32,0x33,0x34,0x35 |
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000020 36373839 DCB 0x36,0x37,0x38,0x39 |
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000024 21214023 DCB 0x21,0x21,0x40,0x23 |
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000028 24252a26 DCB 0x24,0x25,0x2a,0x26 |
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00002c 00 DCB 0x00 |
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|
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;*** Start embedded assembler *** |
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|
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#line 1 "hash_function.c" |
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AREA ||.emb_text||, CODE |
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THUMB |
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EXPORT |generate_hash| |
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#line 8 |
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|generate_hash| PROC |
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#line 9 |
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|
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|
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input_str RN r0 |
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hashtbl RN r1 |
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curr_char RN r2 |
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hash_val RN r3 |
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|
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MOV hash_val, #0 |
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hash_loop |
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LDRB curr_char, [input_str] |
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CMP curr_char, #48 |
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BLS hash_skip |
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|
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CMP curr_char, #57 |
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SUBLS hash_val, curr_char |
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ADDLS hash_val, #48 |
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BLS hash_skip |
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|
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CMP curr_char, #65 - 1 |
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BLS hash_skip |
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|
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CMP curr_char, #90 |
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BHI hash_skip |
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|
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SUB r4, curr_char, #65 |
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ADD r4, hashtbl, r4 |
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LDRB r5, [r4] |
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ADD hash_val, r5 |
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|
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hash_skip |
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ADDS input_str, input_str, #1 |
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CMP curr_char, #0 |
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BNE hash_loop |
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MOVEQ r0, hash_val |
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BX lr |
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ENDP |
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|
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;*** End embedded assembler *** |
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|
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__ARM_use_no_argv EQU 0 |
@ -1,608 +0,0 @@ |
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; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d] |
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; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\objects\retarget_io.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\retarget_io.d --cpu=Cortex-M4.fp.sp --apcs=interwork -O0 --diag_suppress=9931 -I.\RTE\_Target_1 -IC:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\User\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.15.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION=534 -D_RTE_ -DSTM32F401xE -D_RTE_ --omf_browse=.\objects\retarget_io.crf C:\Users\User\AppData\Local\Arm\Packs\Keil\ARM_Compiler\1.6.3\Source\retarget_io.c] |
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THUMB |
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|
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AREA ||i.ITM_ReceiveChar||, CODE, READONLY, ALIGN=2 |
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|
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ITM_ReceiveChar PROC |
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;;;113 int32_t ITM_ReceiveChar (void); |
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;;;114 int32_t ITM_ReceiveChar (void) { |
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000000 f04f30ff MOV r0,#0xffffffff |
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;;;115 int32_t ch = -1; /* no character available */ |
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;;;116 |
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;;;117 if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) { |
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000004 4905 LDR r1,|L1.28| |
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000006 6809 LDR r1,[r1,#0] ; ITM_RxBuffer |
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000008 4a05 LDR r2,|L1.32| |
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00000a 4291 CMP r1,r2 |
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00000c d004 BEQ |L1.24| |
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;;;118 ch = ITM_RxBuffer; |
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00000e 4903 LDR r1,|L1.28| |
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000010 6808 LDR r0,[r1,#0] ; ITM_RxBuffer |
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;;;119 ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */ |
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000012 4611 MOV r1,r2 |
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000014 4a01 LDR r2,|L1.28| |
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000016 6011 STR r1,[r2,#0] ; ITM_RxBuffer |
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|L1.24| |
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;;;120 } |
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;;;121 |
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;;;122 return (ch); |
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;;;123 } |
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000018 4770 BX lr |
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;;;124 |
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ENDP |
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|
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00001a 0000 DCW 0x0000 |
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|L1.28| |
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DCD ITM_RxBuffer |
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|L1.32| |
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DCD 0x5aa55aa5 |
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|
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AREA ||i.ITM_SendChar||, CODE, READONLY, ALIGN=2 |
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|
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ITM_SendChar PROC |
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;;;95 int32_t ITM_SendChar (int32_t ch); |
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;;;96 int32_t ITM_SendChar (int32_t ch) { |
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000000 490a LDR r1,|L2.44| |
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;;;97 if ((ITM_TCR & ITM_TCR_ITMENA_Msk) && /* ITM enabled */ |
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000002 6809 LDR r1,[r1,#0] |
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000004 f0010101 AND r1,r1,#1 |
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000008 b171 CBZ r1,|L2.40| |
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;;;98 (ITM_TER & (1UL << 0) )) { /* ITM Port #0 enabled */ |
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00000a 4908 LDR r1,|L2.44| |
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00000c 3980 SUBS r1,r1,#0x80 |
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00000e 6809 LDR r1,[r1,#0] |
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000010 f0010101 AND r1,r1,#1 |
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000014 b141 CBZ r1,|L2.40| |
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;;;99 while (ITM_PORT0_U32 == 0); |
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000016 bf00 NOP |
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|L2.24| |
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000018 f04f4160 MOV r1,#0xe0000000 |
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00001c 6809 LDR r1,[r1,#0] |
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00001e 2900 CMP r1,#0 |
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000020 d0fa BEQ |L2.24| |
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;;;100 ITM_PORT0_U8 = (uint8_t)ch; |
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000022 f04f4260 MOV r2,#0xe0000000 |
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000026 7010 STRB r0,[r2,#0] |
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|L2.40| |
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;;;101 } |
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;;;102 return (ch); |
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;;;103 } |
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000028 4770 BX lr |
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;;;104 |
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ENDP |
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|
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00002a 0000 DCW 0x0000 |
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|L2.44| |
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DCD 0xe0000e80 |
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|
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AREA ||i._sys_close||, CODE, READONLY, ALIGN=1 |
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|
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_sys_close PROC |
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;;;458 __attribute__((weak)) |
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;;;459 int _sys_close (FILEHANDLE fh) { |
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000000 4601 MOV r1,r0 |
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;;;460 |
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;;;461 switch (fh) { |
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000002 f46f4000 MVN r0,#0x8000 |
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000006 4408 ADD r0,r0,r1 |
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000008 b120 CBZ r0,|L3.20| |
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00000a 2801 CMP r0,#1 |
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00000c d004 BEQ |L3.24| |
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00000e 2802 CMP r0,#2 |
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000010 d106 BNE |L3.32| |
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000012 e003 B |L3.28| |
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|L3.20| |
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;;;462 case FH_STDIN: |
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;;;463 return (0); |
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000014 2000 MOVS r0,#0 |
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|L3.22| |
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;;;464 case FH_STDOUT: |
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;;;465 return (0); |
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;;;466 case FH_STDERR: |
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;;;467 return (0); |
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;;;468 } |
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;;;469 |
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;;;470 #ifdef RTE_Compiler_IO_File |
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;;;471 #ifdef RTE_Compiler_IO_File_FS |
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;;;472 return (__sys_close(fh)); |
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;;;473 #endif |
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;;;474 #else |
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;;;475 return (-1); |
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;;;476 #endif |
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;;;477 } |
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000016 4770 BX lr |
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|L3.24| |
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000018 2000 MOVS r0,#0 ;465 |
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00001a e7fc B |L3.22| |
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|L3.28| |
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00001c 2000 MOVS r0,#0 ;467 |
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00001e e7fa B |L3.22| |
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|L3.32| |
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000020 f04f30ff MOV r0,#0xffffffff ;475 |
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000024 e7f7 B |L3.22| |
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;;;478 #endif |
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ENDP |
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|
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|
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AREA ||i._sys_flen||, CODE, READONLY, ALIGN=1 |
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|
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_sys_flen PROC |
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;;;743 __attribute__((weak)) |
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;;;744 long _sys_flen (FILEHANDLE fh) { |
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000000 4601 MOV r1,r0 |
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;;;745 |
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;;;746 switch (fh) { |
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000002 f46f4000 MVN r0,#0x8000 |
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000006 4408 ADD r0,r0,r1 |
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000008 b120 CBZ r0,|L4.20| |
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00000a 2801 CMP r0,#1 |
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00000c d004 BEQ |L4.24| |
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00000e 2802 CMP r0,#2 |
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000010 d106 BNE |L4.32| |
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000012 e003 B |L4.28| |
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|L4.20| |
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;;;747 case FH_STDIN: |
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;;;748 return (0); |
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000014 2000 MOVS r0,#0 |
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|L4.22| |
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;;;749 case FH_STDOUT: |
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;;;750 return (0); |
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;;;751 case FH_STDERR: |
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;;;752 return (0); |
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;;;753 } |
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;;;754 |
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;;;755 #ifdef RTE_Compiler_IO_File |
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;;;756 #ifdef RTE_Compiler_IO_File_FS |
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;;;757 return (__sys_flen(fh)); |
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;;;758 #endif |
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;;;759 #else |
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;;;760 return (0); |
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;;;761 #endif |
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;;;762 } |
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000016 4770 BX lr |
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|L4.24| |
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000018 2000 MOVS r0,#0 ;750 |
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00001a e7fc B |L4.22| |
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|L4.28| |
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00001c 2000 MOVS r0,#0 ;752 |
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00001e e7fa B |L4.22| |
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|L4.32| |
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000020 2000 MOVS r0,#0 ;760 |
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000022 e7f8 B |L4.22| |
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;;;763 #endif |
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ENDP |
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|
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|
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AREA ||i._sys_istty||, CODE, READONLY, ALIGN=1 |
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|
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_sys_istty PROC |
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;;;669 __attribute__((weak)) |
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;;;670 int _sys_istty (FILEHANDLE fh) { |
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000000 4601 MOV r1,r0 |
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;;;671 |
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;;;672 switch (fh) { |
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000002 f46f4000 MVN r0,#0x8000 |
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000006 4408 ADD r0,r0,r1 |
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000008 b120 CBZ r0,|L5.20| |
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00000a 2801 CMP r0,#1 |
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00000c d004 BEQ |L5.24| |
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00000e 2802 CMP r0,#2 |
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000010 d106 BNE |L5.32| |
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000012 e003 B |L5.28| |
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|L5.20| |
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;;;673 case FH_STDIN: |
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;;;674 return (1); |
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000014 2001 MOVS r0,#1 |
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|L5.22| |
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;;;675 case FH_STDOUT: |
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;;;676 return (1); |
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;;;677 case FH_STDERR: |
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;;;678 return (1); |
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;;;679 } |
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;;;680 |
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;;;681 return (0); |
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;;;682 } |
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000016 4770 BX lr |
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|L5.24| |
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000018 2001 MOVS r0,#1 ;676 |
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00001a e7fc B |L5.22| |
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|L5.28| |
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00001c 2001 MOVS r0,#1 ;678 |
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00001e e7fa B |L5.22| |
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|L5.32| |
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000020 2000 MOVS r0,#0 ;681 |
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000022 e7f8 B |L5.22| |
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;;;683 #endif |
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ENDP |
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|
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|
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AREA ||i._sys_open||, CODE, READONLY, ALIGN=2 |
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|
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_sys_open PROC |
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;;;412 __attribute__((weak)) |
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;;;413 FILEHANDLE _sys_open (const char *name, int openmode) { |
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000000 b570 PUSH {r4-r6,lr} |
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000002 4604 MOV r4,r0 |
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000004 460d MOV r5,r1 |
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;;;414 #if (!defined(RTE_Compiler_IO_File)) |
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;;;415 (void)openmode; |
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;;;416 #endif |
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;;;417 |
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;;;418 if (name == NULL) { |
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000006 b914 CBNZ r4,|L6.14| |
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;;;419 return (-1); |
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000008 f04f30ff MOV r0,#0xffffffff |
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|L6.12| |
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;;;420 } |
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;;;421 |
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;;;422 if (name[0] == ':') { |
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;;;423 if (strcmp(name, ":STDIN") == 0) { |
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;;;424 return (FH_STDIN); |
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;;;425 } |
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;;;426 if (strcmp(name, ":STDOUT") == 0) { |
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;;;427 return (FH_STDOUT); |
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;;;428 } |
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;;;429 if (strcmp(name, ":STDERR") == 0) { |
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;;;430 return (FH_STDERR); |
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;;;431 } |
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;;;432 return (-1); |
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;;;433 } |
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;;;434 |
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;;;435 #ifdef RTE_Compiler_IO_File |
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;;;436 #ifdef RTE_Compiler_IO_File_FS |
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;;;437 return (__sys_open(name, openmode)); |
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;;;438 #endif |
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;;;439 #else |
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;;;440 return (-1); |
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;;;441 #endif |
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;;;442 } |
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00000c bd70 POP {r4-r6,pc} |
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|L6.14| |
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00000e 7820 LDRB r0,[r4,#0] ;422 |
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000010 283a CMP r0,#0x3a ;422 |
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000012 d11a BNE |L6.74| |
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000014 a10e ADR r1,|L6.80| |
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000016 4620 MOV r0,r4 ;423 |
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000018 f7fffffe BL strcmp |
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00001c b910 CBNZ r0,|L6.36| |
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00001e f2480001 MOV r0,#0x8001 ;424 |
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000022 e7f3 B |L6.12| |
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|L6.36| |
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000024 a10c ADR r1,|L6.88| |
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000026 4620 MOV r0,r4 ;426 |
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000028 f7fffffe BL strcmp |
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00002c b910 CBNZ r0,|L6.52| |
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00002e f2480002 MOV r0,#0x8002 ;427 |
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000032 e7eb B |L6.12| |
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|L6.52| |
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000034 a10a ADR r1,|L6.96| |
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000036 4620 MOV r0,r4 ;429 |
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000038 f7fffffe BL strcmp |
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00003c b910 CBNZ r0,|L6.68| |
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00003e f2480003 MOV r0,#0x8003 ;430 |
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000042 e7e3 B |L6.12| |
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|L6.68| |
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000044 f04f30ff MOV r0,#0xffffffff ;432 |
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000048 e7e0 B |L6.12| |
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|L6.74| |
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00004a f04f30ff MOV r0,#0xffffffff ;440 |
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00004e e7dd B |L6.12| |
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;;;443 #endif |
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ENDP |
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|
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|L6.80| |
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000050 3a535444 DCB ":STDIN",0 |
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000054 494e00 |
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000057 00 DCB 0 |
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|L6.88| |
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000058 3a535444 DCB ":STDOUT",0 |
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00005c 4f555400 |
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|L6.96| |
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000060 3a535444 DCB ":STDERR",0 |
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000064 45525200 |
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|
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AREA ||i._sys_read||, CODE, READONLY, ALIGN=1 |
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|
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_sys_read PROC |
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;;;576 __attribute__((weak)) |
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;;;577 int _sys_read (FILEHANDLE fh, uint8_t *buf, uint32_t len, int mode) { |
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000000 e92d41f0 PUSH {r4-r8,lr} |
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000004 4607 MOV r7,r0 |
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000006 460e MOV r6,r1 |
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000008 4614 MOV r4,r2 |
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00000a 4698 MOV r8,r3 |
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;;;578 #ifdef RTE_Compiler_IO_STDIN |
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;;;579 int ch; |
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;;;580 #elif (!defined(RTE_Compiler_IO_File)) |
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;;;581 (void)buf; |
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;;;582 (void)len; |
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;;;583 #endif |
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;;;584 (void)mode; |
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;;;585 |
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;;;586 switch (fh) { |
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00000c f46f4000 MVN r0,#0x8000 |
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000010 4438 ADD r0,r0,r7 |
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000012 b120 CBZ r0,|L7.30| |
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000014 2801 CMP r0,#1 |
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000016 d010 BEQ |L7.58| |
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000018 2802 CMP r0,#2 |
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00001a d114 BNE |L7.70| |
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00001c e010 B |L7.64| |
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|L7.30| |
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;;;587 case FH_STDIN: |
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;;;588 #ifdef RTE_Compiler_IO_STDIN |
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;;;589 ch = stdin_getchar(); |
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00001e f7fffffe BL stdin_getchar |
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000022 4605 MOV r5,r0 |
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;;;590 if (ch < 0) { |
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000024 2d00 CMP r5,#0 |
|||
000026 da03 BGE |L7.48| |
|||
;;;591 return ((int)(len | 0x80000000U)); |
|||
000028 f0444000 ORR r0,r4,#0x80000000 |
|||
|L7.44| |
|||
;;;592 } |
|||
;;;593 *buf++ = (uint8_t)ch; |
|||
;;;594 #if (STDIN_ECHO != 0) |
|||
;;;595 stdout_putchar(ch); |
|||
;;;596 #endif |
|||
;;;597 len--; |
|||
;;;598 return ((int)(len)); |
|||
;;;599 #else |
|||
;;;600 return ((int)(len | 0x80000000U)); |
|||
;;;601 #endif |
|||
;;;602 case FH_STDOUT: |
|||
;;;603 return (-1); |
|||
;;;604 case FH_STDERR: |
|||
;;;605 return (-1); |
|||
;;;606 } |
|||
;;;607 |
|||
;;;608 #ifdef RTE_Compiler_IO_File |
|||
;;;609 #ifdef RTE_Compiler_IO_File_FS |
|||
;;;610 return (__sys_read(fh, buf, len)); |
|||
;;;611 #endif |
|||
;;;612 #else |
|||
;;;613 return (-1); |
|||
;;;614 #endif |
|||
;;;615 } |
|||
00002c e8bd81f0 POP {r4-r8,pc} |
|||
|L7.48| |
|||
000030 f8065b01 STRB r5,[r6],#1 ;593 |
|||
000034 1e64 SUBS r4,r4,#1 ;597 |
|||
000036 4620 MOV r0,r4 ;598 |
|||
000038 e7f8 B |L7.44| |
|||
|L7.58| |
|||
00003a f04f30ff MOV r0,#0xffffffff ;603 |
|||
00003e e7f5 B |L7.44| |
|||
|L7.64| |
|||
000040 f04f30ff MOV r0,#0xffffffff ;605 |
|||
000044 e7f2 B |L7.44| |
|||
|L7.70| |
|||
000046 f04f30ff MOV r0,#0xffffffff ;613 |
|||
00004a e7ef B |L7.44| |
|||
;;;616 #endif |
|||
ENDP |
|||
|
|||
|
|||
AREA ||i._sys_seek||, CODE, READONLY, ALIGN=1 |
|||
|
|||
_sys_seek PROC |
|||
;;;701 __attribute__((weak)) |
|||
;;;702 int _sys_seek (FILEHANDLE fh, long pos) { |
|||
000000 4602 MOV r2,r0 |
|||
;;;703 #if (!defined(RTE_Compiler_IO_File)) |
|||
;;;704 (void)pos; |
|||
;;;705 #endif |
|||
;;;706 |
|||
;;;707 switch (fh) { |
|||
000002 f46f4000 MVN r0,#0x8000 |
|||
000006 4410 ADD r0,r0,r2 |
|||
000008 b120 CBZ r0,|L8.20| |
|||
00000a 2801 CMP r0,#1 |
|||
00000c d005 BEQ |L8.26| |
|||
00000e 2802 CMP r0,#2 |
|||
000010 d109 BNE |L8.38| |
|||
000012 e005 B |L8.32| |
|||
|L8.20| |
|||
;;;708 case FH_STDIN: |
|||
;;;709 return (-1); |
|||
000014 f04f30ff MOV r0,#0xffffffff |
|||
|L8.24| |
|||
;;;710 case FH_STDOUT: |
|||
;;;711 return (-1); |
|||
;;;712 case FH_STDERR: |
|||
;;;713 return (-1); |
|||
;;;714 } |
|||
;;;715 |
|||
;;;716 #ifdef RTE_Compiler_IO_File |
|||
;;;717 #ifdef RTE_Compiler_IO_File_FS |
|||
;;;718 return (__sys_seek(fh, (uint32_t)pos)); |
|||
;;;719 #endif |
|||
;;;720 #else |
|||
;;;721 return (-1); |
|||
;;;722 #endif |
|||
;;;723 } |
|||
000018 4770 BX lr |
|||
|L8.26| |
|||
00001a f04f30ff MOV r0,#0xffffffff ;711 |
|||
00001e e7fb B |L8.24| |
|||
|L8.32| |
|||
000020 f04f30ff MOV r0,#0xffffffff ;713 |
|||
000024 e7f8 B |L8.24| |
|||
|L8.38| |
|||
000026 f04f30ff MOV r0,#0xffffffff ;721 |
|||
00002a e7f5 B |L8.24| |
|||
;;;724 #endif |
|||
ENDP |
|||
|
|||
|
|||
AREA ||i._sys_write||, CODE, READONLY, ALIGN=1 |
|||
|
|||
_sys_write PROC |
|||
;;;500 __attribute__((weak)) |
|||
;;;501 int _sys_write (FILEHANDLE fh, const uint8_t *buf, uint32_t len, int mode) { |
|||
000000 e92d41f0 PUSH {r4-r8,lr} |
|||
000004 4607 MOV r7,r0 |
|||
000006 460c MOV r4,r1 |
|||
000008 4615 MOV r5,r2 |
|||
00000a 4698 MOV r8,r3 |
|||
;;;502 #if (defined(RTE_Compiler_IO_STDOUT) || defined(RTE_Compiler_IO_STDERR)) |
|||
;;;503 int ch; |
|||
;;;504 #elif (!defined(RTE_Compiler_IO_File)) |
|||
;;;505 (void)buf; |
|||
;;;506 (void)len; |
|||
;;;507 #endif |
|||
;;;508 (void)mode; |
|||
;;;509 |
|||
;;;510 switch (fh) { |
|||
00000c f46f4000 MVN r0,#0x8000 |
|||
000010 4438 ADD r0,r0,r7 |
|||
000012 b120 CBZ r0,|L9.30| |
|||
000014 2801 CMP r0,#1 |
|||
000016 d006 BEQ |L9.38| |
|||
000018 2802 CMP r0,#2 |
|||
00001a d11a BNE |L9.82| |
|||
00001c e00e B |L9.60| |
|||
|L9.30| |
|||
;;;511 case FH_STDIN: |
|||
;;;512 return (-1); |
|||
00001e f04f30ff MOV r0,#0xffffffff |
|||
|L9.34| |
|||
;;;513 case FH_STDOUT: |
|||
;;;514 #ifdef RTE_Compiler_IO_STDOUT |
|||
;;;515 for (; len; len--) { |
|||
;;;516 ch = *buf++; |
|||
;;;517 #if (STDOUT_CR_LF != 0) |
|||
;;;518 if (ch == '\n') stdout_putchar('\r'); |
|||
;;;519 #endif |
|||
;;;520 stdout_putchar(ch); |
|||
;;;521 } |
|||
;;;522 #endif |
|||
;;;523 return (0); |
|||
;;;524 case FH_STDERR: |
|||
;;;525 #ifdef RTE_Compiler_IO_STDERR |
|||
;;;526 for (; len; len--) { |
|||
;;;527 ch = *buf++; |
|||
;;;528 #if (STDERR_CR_LF != 0) |
|||
;;;529 if (ch == '\n') stderr_putchar('\r'); |
|||
;;;530 #endif |
|||
;;;531 stderr_putchar(ch); |
|||
;;;532 } |
|||
;;;533 #endif |
|||
;;;534 return (0); |
|||
;;;535 } |
|||
;;;536 |
|||
;;;537 #ifdef RTE_Compiler_IO_File |
|||
;;;538 #ifdef RTE_Compiler_IO_File_FS |
|||
;;;539 return (__sys_write(fh, buf, len)); |
|||
;;;540 #endif |
|||
;;;541 #else |
|||
;;;542 return (-1); |
|||
;;;543 #endif |
|||
;;;544 } |
|||
000022 e8bd81f0 POP {r4-r8,pc} |
|||
|L9.38| |
|||
000026 e005 B |L9.52| |
|||
|L9.40| |
|||
000028 f8146b01 LDRB r6,[r4],#1 ;516 |
|||
00002c 4630 MOV r0,r6 ;520 |
|||
00002e f7fffffe BL stdout_putchar |
|||
000032 1e6d SUBS r5,r5,#1 ;515 |
|||
|L9.52| |
|||
000034 2d00 CMP r5,#0 ;515 |
|||
000036 d1f7 BNE |L9.40| |
|||
000038 2000 MOVS r0,#0 ;523 |
|||
00003a e7f2 B |L9.34| |
|||
|L9.60| |
|||
00003c e005 B |L9.74| |
|||
|L9.62| |
|||
00003e f8146b01 LDRB r6,[r4],#1 ;527 |
|||
000042 4630 MOV r0,r6 ;531 |
|||
000044 f7fffffe BL stderr_putchar |
|||
000048 1e6d SUBS r5,r5,#1 ;526 |
|||
|L9.74| |
|||
00004a 2d00 CMP r5,#0 ;526 |
|||
00004c d1f7 BNE |L9.62| |
|||
00004e 2000 MOVS r0,#0 ;534 |
|||
000050 e7e7 B |L9.34| |
|||
|L9.82| |
|||
000052 f04f30ff MOV r0,#0xffffffff ;542 |
|||
000056 e7e4 B |L9.34| |
|||
;;;545 #endif |
|||
ENDP |
|||
|
|||
|
|||
AREA ||i.stderr_putchar||, CODE, READONLY, ALIGN=1 |
|||
|
|||
stderr_putchar PROC |
|||
;;;202 #elif defined(RTE_Compiler_IO_STDERR_ITM) |
|||
;;;203 static int stderr_putchar (int ch) { |
|||
000000 b500 PUSH {lr} |
|||
000002 4603 MOV r3,r0 |
|||
;;;204 return (ITM_SendChar(ch)); |
|||
000004 4618 MOV r0,r3 |
|||
000006 f7fffffe BL ITM_SendChar |
|||
;;;205 } |
|||
00000a bd00 POP {pc} |
|||
;;;206 #elif defined(RTE_Compiler_IO_STDERR_BKPT) |
|||
ENDP |
|||
|
|||
|
|||
AREA ||i.stdin_getchar||, CODE, READONLY, ALIGN=1 |
|||
|
|||
stdin_getchar PROC |
|||
;;;136 #elif defined(RTE_Compiler_IO_STDIN_ITM) |
|||
;;;137 static int stdin_getchar (void) { |
|||
000000 b500 PUSH {lr} |
|||
;;;138 int32_t ch; |
|||
;;;139 |
|||
;;;140 do { |
|||
000002 bf00 NOP |
|||
|L11.4| |
|||
;;;141 ch = ITM_ReceiveChar(); |
|||
000004 f7fffffe BL ITM_ReceiveChar |
|||
;;;142 } while (ch == -1); |
|||
000008 1c41 ADDS r1,r0,#1 |
|||
00000a 2900 CMP r1,#0 |
|||
00000c d0fa BEQ |L11.4| |
|||
;;;143 return (ch); |
|||
;;;144 } |
|||
00000e bd00 POP {pc} |
|||
;;;145 #elif defined(RTE_Compiler_IO_STDIN_BKPT) |
|||
ENDP |
|||
|
|||
|
|||
AREA ||i.stdout_putchar||, CODE, READONLY, ALIGN=1 |
|||
|
|||
stdout_putchar PROC |
|||
;;;165 #elif defined(RTE_Compiler_IO_STDOUT_ITM) |
|||
;;;166 static int stdout_putchar (int ch) { |
|||
000000 b500 PUSH {lr} |
|||
000002 4603 MOV r3,r0 |
|||
;;;167 return (ITM_SendChar(ch)); |
|||
000004 4618 MOV r0,r3 |
|||
000006 f7fffffe BL ITM_SendChar |
|||
;;;168 } |
|||
00000a bd00 POP {pc} |
|||
;;;169 #elif defined(RTE_Compiler_IO_STDOUT_EVR) |
|||
ENDP |
|||
|
|||
|
|||
AREA ||.constdata||, DATA, READONLY, ALIGN=0 |
|||
|
|||
__stdin_name |
|||
000000 3a535444 DCB 0x3a,0x53,0x54,0x44 |
|||
000004 494e00 DCB 0x49,0x4e,0x00 |
|||
__stdout_name |
|||
000007 3a DCB 0x3a |
|||
000008 5354444f DCB 0x53,0x54,0x44,0x4f |
|||
00000c 555400 DCB 0x55,0x54,0x00 |
|||
__stderr_name |
|||
00000f 3a DCB 0x3a |
|||
000010 53544445 DCB 0x53,0x54,0x44,0x45 |
|||
000014 525200 DCB 0x52,0x52,0x00 |
|||
|
|||
AREA ||.data||, DATA, ALIGN=2 |
|||
|
|||
ITM_RxBuffer |
|||
DCD 0x5aa55aa5 |
@ -1,239 +0,0 @@ |
|||
; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d] |
|||
; commandline ArmCC [--list --split_sections --debug -c --asm --interleave -o.\objects\system_stm32f4xx.o --asm_dir=.\Listings\ --list_dir=.\Listings\ --depend=.\objects\system_stm32f4xx.d --cpu=Cortex-M4.fp.sp --apcs=interwork -O0 --diag_suppress=9931 -I.\RTE\_Target_1 -IC:\Users\User\AppData\Local\Arm\Packs\ARM\CMSIS\5.7.0\CMSIS\Core\Include -IC:\Users\User\AppData\Local\Arm\Packs\Keil\STM32F4xx_DFP\2.15.0\Drivers\CMSIS\Device\ST\STM32F4xx\Include -D__UVISION_VERSION=534 -D_RTE_ -DSTM32F401xE -D_RTE_ --omf_browse=.\objects\system_stm32f4xx.crf RTE\Device\STM32F401RETx\system_stm32f4xx.c] |
|||
THUMB |
|||
|
|||
AREA ||i.SystemCoreClockUpdate||, CODE, READONLY, ALIGN=2 |
|||
|
|||
SystemCoreClockUpdate PROC |
|||
;;;204 */ |
|||
;;;205 void SystemCoreClockUpdate(void) |
|||
000000 b570 PUSH {r4-r6,lr} |
|||
;;;206 { |
|||
;;;207 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2; |
|||
000002 2000 MOVS r0,#0 |
|||
000004 2200 MOVS r2,#0 |
|||
000006 2302 MOVS r3,#2 |
|||
000008 2400 MOVS r4,#0 |
|||
00000a 2102 MOVS r1,#2 |
|||
;;;208 |
|||
;;;209 /* Get SYSCLK source -------------------------------------------------------*/ |
|||
;;;210 tmp = RCC->CFGR & RCC_CFGR_SWS; |
|||
00000c 4d27 LDR r5,|L1.172| |
|||
00000e 682d LDR r5,[r5,#0] |
|||
000010 f005000c AND r0,r5,#0xc |
|||
;;;211 |
|||
;;;212 switch (tmp) |
|||
000014 b120 CBZ r0,|L1.32| |
|||
000016 2804 CMP r0,#4 |
|||
000018 d006 BEQ |L1.40| |
|||
00001a 2808 CMP r0,#8 |
|||
00001c d134 BNE |L1.136| |
|||
00001e e007 B |L1.48| |
|||
|L1.32| |
|||
;;;213 { |
|||
;;;214 case 0x00: /* HSI used as system clock source */ |
|||
;;;215 SystemCoreClock = HSI_VALUE; |
|||
000020 4d23 LDR r5,|L1.176| |
|||
000022 4e24 LDR r6,|L1.180| |
|||
000024 6035 STR r5,[r6,#0] ; SystemCoreClock |
|||
;;;216 break; |
|||
000026 e033 B |L1.144| |
|||
|L1.40| |
|||
;;;217 case 0x04: /* HSE used as system clock source */ |
|||
;;;218 SystemCoreClock = HSE_VALUE; |
|||
000028 4d23 LDR r5,|L1.184| |
|||
00002a 4e22 LDR r6,|L1.180| |
|||
00002c 6035 STR r5,[r6,#0] ; SystemCoreClock |
|||
;;;219 break; |
|||
00002e e02f B |L1.144| |
|||
|L1.48| |
|||
;;;220 case 0x08: /* PLL used as system clock source */ |
|||
;;;221 |
|||
;;;222 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N |
|||
;;;223 SYSCLK = PLL_VCO / PLL_P |
|||
;;;224 */ |
|||
;;;225 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22; |
|||
000030 4d1e LDR r5,|L1.172| |
|||
000032 1f2d SUBS r5,r5,#4 |
|||
000034 682d LDR r5,[r5,#0] |
|||
000036 f3c55480 UBFX r4,r5,#22,#1 |
|||
;;;226 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; |
|||
00003a 4d1c LDR r5,|L1.172| |
|||
00003c 1f2d SUBS r5,r5,#4 |
|||
00003e 682d LDR r5,[r5,#0] |
|||
000040 f005013f AND r1,r5,#0x3f |
|||
;;;227 |
|||
;;;228 if (pllsource != 0) |
|||
000044 b154 CBZ r4,|L1.92| |
|||
;;;229 { |
|||
;;;230 /* HSE used as PLL clock source */ |
|||
;;;231 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); |
|||
000046 4d1c LDR r5,|L1.184| |
|||
000048 fbb5f5f1 UDIV r5,r5,r1 |
|||
00004c 4e17 LDR r6,|L1.172| |
|||
00004e 1f36 SUBS r6,r6,#4 |
|||
000050 6836 LDR r6,[r6,#0] |
|||
000052 f3c61688 UBFX r6,r6,#6,#9 |
|||
000056 fb05f206 MUL r2,r5,r6 |
|||
00005a e009 B |L1.112| |
|||
|L1.92| |
|||
;;;232 } |
|||
;;;233 else |
|||
;;;234 { |
|||
;;;235 /* HSI used as PLL clock source */ |
|||
;;;236 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6); |
|||
00005c 4d14 LDR r5,|L1.176| |
|||
00005e fbb5f5f1 UDIV r5,r5,r1 |
|||
000062 4e12 LDR r6,|L1.172| |
|||
000064 1f36 SUBS r6,r6,#4 |
|||
000066 6836 LDR r6,[r6,#0] |
|||
000068 f3c61688 UBFX r6,r6,#6,#9 |
|||
00006c fb05f206 MUL r2,r5,r6 |
|||
|L1.112| |
|||
;;;237 } |
|||
;;;238 |
|||
;;;239 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2; |
|||
000070 4d0e LDR r5,|L1.172| |
|||
000072 1f2d SUBS r5,r5,#4 |
|||
000074 682d LDR r5,[r5,#0] |
|||
000076 f3c54501 UBFX r5,r5,#16,#2 |
|||
00007a 1c6d ADDS r5,r5,#1 |
|||
00007c 006b LSLS r3,r5,#1 |
|||
;;;240 SystemCoreClock = pllvco/pllp; |
|||
00007e fbb2f5f3 UDIV r5,r2,r3 |
|||
000082 4e0c LDR r6,|L1.180| |
|||
000084 6035 STR r5,[r6,#0] ; SystemCoreClock |
|||
;;;241 break; |
|||
000086 e003 B |L1.144| |
|||
|L1.136| |
|||
;;;242 default: |
|||
;;;243 SystemCoreClock = HSI_VALUE; |
|||
000088 4d09 LDR r5,|L1.176| |
|||
00008a 4e0a LDR r6,|L1.180| |
|||
00008c 6035 STR r5,[r6,#0] ; SystemCoreClock |
|||
;;;244 break; |
|||
00008e bf00 NOP |
|||
|L1.144| |
|||
000090 bf00 NOP ;216 |
|||
;;;245 } |
|||
;;;246 /* Compute HCLK frequency --------------------------------------------------*/ |
|||
;;;247 /* Get HCLK prescaler */ |
|||
;;;248 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; |
|||
000092 4d06 LDR r5,|L1.172| |
|||
000094 682d LDR r5,[r5,#0] |
|||
000096 f3c51503 UBFX r5,r5,#4,#4 |
|||
00009a 4e08 LDR r6,|L1.188| |
|||
00009c 5d70 LDRB r0,[r6,r5] |
|||
;;;249 /* HCLK frequency */ |
|||
;;;250 SystemCoreClock >>= tmp; |
|||
00009e 4d05 LDR r5,|L1.180| |
|||
0000a0 682d LDR r5,[r5,#0] ; SystemCoreClock |
|||
0000a2 40c5 LSRS r5,r5,r0 |
|||
0000a4 4e03 LDR r6,|L1.180| |
|||
0000a6 6035 STR r5,[r6,#0] ; SystemCoreClock |
|||
;;;251 } |
|||
0000a8 bd70 POP {r4-r6,pc} |
|||
;;;252 |
|||
ENDP |
|||
|
|||
0000aa 0000 DCW 0x0000 |
|||
|L1.172| |
|||
DCD 0x40023808 |
|||
|L1.176| |
|||
DCD 0x00f42400 |
|||
|L1.180| |
|||
DCD SystemCoreClock |
|||
|L1.184| |
|||
DCD 0x017d7840 |
|||
|L1.188| |
|||
DCD AHBPrescTable |
|||
|
|||
AREA ||i.SystemInit||, CODE, READONLY, ALIGN=2 |
|||
|
|||
SystemInit PROC |
|||
;;;149 */ |
|||
;;;150 void SystemInit(void) |
|||
000000 4805 LDR r0,|L2.24| |
|||
;;;151 { |
|||
;;;152 /* FPU settings ------------------------------------------------------------*/ |
|||
;;;153 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) |
|||
;;;154 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ |
|||
000002 6800 LDR r0,[r0,#0] |
|||
000004 f4400070 ORR r0,r0,#0xf00000 |
|||
000008 4903 LDR r1,|L2.24| |
|||
00000a 6008 STR r0,[r1,#0] |
|||
;;;155 #endif |
|||
;;;156 |
|||
;;;157 #if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM) |
|||
;;;158 SystemInit_ExtMemCtl(); |
|||
;;;159 #endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */ |
|||
;;;160 |
|||
;;;161 /* Configure the Vector Table location add offset address ------------------*/ |
|||
;;;162 #ifdef VECT_TAB_SRAM |
|||
;;;163 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ |
|||
;;;164 #else |
|||
;;;165 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ |
|||
00000c f04f6000 MOV r0,#0x8000000 |
|||
000010 4901 LDR r1,|L2.24| |
|||
000012 3980 SUBS r1,r1,#0x80 |
|||
000014 6008 STR r0,[r1,#0] |
|||
;;;166 #endif |
|||
;;;167 } |
|||
000016 4770 BX lr |
|||
;;;168 |
|||
ENDP |
|||
|
|||
|L2.24| |
|||
DCD 0xe000ed88 |
|||
|
|||
AREA ||.constdata||, DATA, READONLY, ALIGN=0 |
|||
|
|||
AHBPrescTable |
|||
000000 00000000 DCB 0x00,0x00,0x00,0x00 |
|||
000004 00000000 DCB 0x00,0x00,0x00,0x00 |
|||
000008 01020304 DCB 0x01,0x02,0x03,0x04 |
|||
00000c 06070809 DCB 0x06,0x07,0x08,0x09 |
|||
APBPrescTable |
|||
000010 00000000 DCB 0x00,0x00,0x00,0x00 |
|||
000014 01020304 DCB 0x01,0x02,0x03,0x04 |
|||
|
|||
AREA ||.data||, DATA, ALIGN=2 |
|||
|
|||
SystemCoreClock |
|||
DCD 0x00f42400 |
|||
|
|||
;*** Start embedded assembler *** |
|||
|
|||
#line 1 "RTE\\Device\\STM32F401RETx\\system_stm32f4xx.c" |
|||
AREA ||.rev16_text||, CODE |
|||
THUMB |
|||
EXPORT |__asm___18_system_stm32f4xx_c_5d646a67____REV16| |
|||
#line 481 "C:\\Users\\User\\AppData\\Local\\Arm\\Packs\\ARM\\CMSIS\\5.7.0\\CMSIS\\Core\\Include\\cmsis_armcc.h" |
|||
|__asm___18_system_stm32f4xx_c_5d646a67____REV16| PROC |
|||
#line 482 |
|||
|
|||
rev16 r0, r0 |
|||
bx lr |
|||
ENDP |
|||
AREA ||.revsh_text||, CODE |
|||
THUMB |
|||
EXPORT |__asm___18_system_stm32f4xx_c_5d646a67____REVSH| |
|||
#line 496 |
|||
|__asm___18_system_stm32f4xx_c_5d646a67____REVSH| PROC |
|||
#line 497 |
|||
|
|||
revsh r0, r0 |
|||
bx lr |
|||
ENDP |
|||
AREA ||.rrx_text||, CODE |
|||
THUMB |
|||
EXPORT |__asm___18_system_stm32f4xx_c_5d646a67____RRX| |
|||
#line 683 |
|||
|__asm___18_system_stm32f4xx_c_5d646a67____RRX| PROC |
|||
#line 684 |
|||
|
|||
rrx r0, r0 |
|||
bx lr |
|||
ENDP |
|||
|
|||
;*** End embedded assembler *** |
Loading…
Reference in new issue